Cypress Semiconductor /psoc63 /USBFS0 /USBDEV /OSCLK_DR1

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Interpret as OSCLK_DR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDER_MSB

Description

Oscillator lock data register 1

Fields

ADDER_MSB

These bits return the upper 7 bits of the oscillator locking circuits adder output.

Links

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